The present invention relates to a method of operating a flash memory device. More particularly, the present invention relates to a method of operating a flash memory device for narrowing threshold voltage distribution of memory cells.
A flash memory device is a representative non-volatile memory device in which data are not erased though supply of a power source is stopped.
A flash memory device is divided into an NOR flash memory device and an NAND flash memory device in accordance with structure of a memory cell array.
The NAND flash memory device has been widely used because the NAND flash memory device has high integration density characteristics compared to the NOR flash memory device.
Recently, a technique for storing at least two bit data in one memory cell in the NAND flash memory device has been developed.
In case that a memory cell stores one bit data, the memory cell has two threshold voltage levels, i.e., a level smaller than 0V and a level higher than 0V.
However, in case that a memory cell stores 2 bit data, the memory cell has four threshold voltage levels, i.e., one level smaller than 0V and three levels higher than 0V. Here, since the memory cell has three threshold voltage levels higher than 0V, the margins for separating the threshold voltage levels may not be adequate when threshold voltage distribution width is wide. Hence, the threshold voltage distributions having different levels may be overlapped.
In this case, since data stored in the memory cell are not separated, an error may occur in the memory cell. Accordingly, the memory cell should have narrow threshold voltage distributions. Here, since three threshold voltage distributions exist in a given range, the threshold voltage distributions should be configured to have considerable small widths. However, due to characteristics of a program operation of the flash memory device, the potential for narrowing the width of the threshold voltage distributions is limited.